V.D.Baykov, S.N.Vashkevich, M.B.Sergeev

Applied subroutines for microprocessor checking and control systems,

St.Petersburg, Politechnika 1992, 223 pages.

  
 
 The brief outline of my publications ,
 related only to CORDIC (digit-by-digit) method
 ( from the "Computer&Control Abstracts" : 1973 - 1984)

 
03354391 INSPEC Abstract Number: C85001957 
 Title: On implementation of the 'digit-by-digit' method using immediate 
 convergence test 
 Author(s): Baikov, V.P. 
 Journal: Vychislitel'naya Tekhnika i Voprosy Kibernetiki no.20 p. 
97-105 
 Publication Date: 1984 Country of Publication: USSR 
 CODEN: VTVKAP  ISSN: 0202-2494 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Theoretical (T) 
 Abstract: A single iteration is executed, instead of a series of q/sub i/ 
iterations, to directly determine the value q/sub i/ where i is the results 
digit. As the maximum value q/sub i/ for all elementary functions is 
proportional to the 'base' of the alpha -system, where q/sub i/= alpha -1, 
then it is apparent that increasing the value of alpha improves the 
efficiency of the method. In a direct check on convergence it is possible 
to normalise the current argument value by a shift to the left by one alpha 
-digit. (2 Refs) 
 Subfile: C 
 
 
03319055 INSPEC Abstract Number: B84046436, C84044275 
 Title: Bipolar unswitched  logic arrays-universal basic element for 
 functional expanders for calculating elementary functions 
 Author(s): Baikov, V.D.; Kryc', A.I. 
 Journal: Izvestiya Vysshikh Uchebnykh Zavedenii, Priborostroenie 
vol.27, no.5 p.48-53 
 Publication Date: May 1984 Country of Publication: USSR 
 CODEN: IVUBAY ISSN: 0021-3454 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Practical (P) 
 Abstract: Two versions of the design of functional expanders intended for 
calculating elementary functions by the 'digit by digit' method are 
compared-one using series K1804 microprocessor-family elements and one 
using bipolar unswitched logic arrays. Specific calculated values are given 
for the expenditure in terms  of hardware, time, energy and cost on 
designing and manufacturing functional expanders built using each of the 
versions. The advantages of the unswitched logic array devices over the 
microprocessor-family devices are demonstrated. (5 Refs) 
 Subfile: B C 
 
 
02831411 INSPEC Abstract Number: C82015146 
 Title: A pipelined computing array for elementary functions 
 Author(s): Al'khovik, A.S.; Baikov, V.D.; Smolov, V.B. 
 Author Affiliation: Leningrad Electrotech. Inst., Leningrad, USSR 
 Journal: Avtomatika i Telemekhanika vol.42, no.5 p.181-4 
 Publication Date: May 1981 Country of Publication: USSR 
 CODEN: AVTEAI ISSN: 0005-2310 
 Translated in: Automation and Remote Control vol.42, no.5, pt.2 p. 
702-4 
 Publication Date: May 1981 Country of Publication: USA 
 CODEN: AURCAT ISSN: 0005-1179 
 Language: English Document Type: Journal Paper (JP) 
 Treatment: Theoretical (T) 
 Abstract: Considers a pipelined computing array using Volder's 
digit-after-digit algorithm. The array speed is estimated and the array is 
compared with existing register structures and asynchronous arrays. (5 
 Refs) 
 Subfile: C 
 
 
02504440 INSPEC Abstract Number: C80015472 
 Title: Evaluating response time of algorithms for calculating elementary 
 functions by 'digit-by-digit' method 
 Author(s): Baikov, V.D.; Pikulin, V.V. 
 Journal: Vychislitel'naya Tekhnika i Voprosy Kibernetiki no.16 p. 
85-97 
 Publication Date: 1979 Country of Publication: USSR 
 CODEN: VTVKAP ISSN: 0202-2494 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Applications (A); Theoretical (T) 
 Abstract: The convergence of algorithms for calculating elementary 
functions by the 'digit-by-digit' method in a positional number system with 
a whole positive base is analysed. The analysis is made in order to 
determine, firstly, the magnitude of the base of the number system which 
will ensure a minimum number of iterations in calculating an unknown and, 
secondly, the optimum (in terms of response time) way of organising the 
iteration process for a known magnitude of the number system's base. (4 
 Refs) 
 Subfile: C 
 
 
02488596 INSPEC Abstract Number: C80011854 
 Title: Algorithms for calculating elementary functions using 
 'digit-by-digit' method with direct convergence testing 
 Author(s): Baikov, V.D.; Mikhanov, A.A. 
 Journal: Izvestiya Vysshikh Uchebnykh Zavedenii, Priborostroenie 
vol.22, no.6 p.53-5 
 Publication Date: June 1979 Country of Publication: USSR 
 CODEN: IVUBAY ISSN: 0021-3454 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Theoretical (T) 
 Abstract: Examines several versions of algorithms for calculating 
elementary functions using the 'digit-by-digit' method. The response time 
is improved by the modification of the algorithms. (3 Refs) 
 Subfile: C 
 
 
02248306 INSPEC Abstract Number: C78025531 
 Title: Promising directions in the use of 'digit-by-digit' methods in 
 microprogram processors 
 Author(s): Smolov, V.B.; Baikov, V.D. 
 Journal: Izvestiya Vysshikh Uchebnykh Zavedenii, Priborostroenie 
vol.21, no.5 p.46-53 
 Publication Date: 1978 Country of Publication: USSR 
 CODEN: IVUBAY ISSN: 0021-3454 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Applications (A); Theoretical (T) 
 Abstract: The underlying principle of the digit-by-digit method is 
outlined and its particular suitability for use in microprogram processors 
is pointed out. A detailed analytic review is made of the literature on 
applications of the method to the solution of a wide class of computing 
tasks. (32 Refs) 
 Subfile: C 
 
 
02121929 INSPEC Abstract Number: B77040490, C77026921 
 Title: Digit by digit floating point computation of log and exponential 
 functions 
 Author(s): Baikov, V.D. 
 Journal: Izvestiya Vysshikh Uchebnykh Zavedenii,  Priborostroenie 
vol.20, no.5 p.59-62 
 Publication Date: 1977 Country of Publication: USSR 
 CODEN: IVUBAY ISSN: 0021-3454 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Theoretical (T) 
 Abstract: An analysis is made of the problem of bringing the arguments to 
the convergence range and different methods are considered for organizing 
the iterative process. (9 Refs) 
 Subfile: B C 
 
 
01848137 INSPEC Abstract Number: B76002170, C76002442 
 Title: Two hardware methods of time function computation in hybrid 
 function generators 
 Author(s): Baikov, V.D.; Svin'in, S.F. 
 Journal: Izvestiya Vysshikh Uchebnykh Zavedenii, Priborostroenie 
vol.18, no.8 p.66-70 
 Publication Date: 1975 Country of Publication: USSR 
 CODEN: IVUBAY ISSN: 0021-3454 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Practical (P) 
 Abstract: Two algorithms for the fast computation in digital form of time 
functions, containing only the addition and shift operations, are 
considered: a 'digit-by-digit' method and the Fourier-Walsh Series 
development of the function increments. These methods are discussed from 
the point-of-view of speed and the possibility of making use of analog as 
well as digital components in both realtime and accelerated time scales. ( 
6 Refs) 
 Subfile: B C 
 
 
01537747 INSPEC Abstract Number: C73016757 
 Title: Analysis of a group of Volder algorithm errors 
 Author(s): Baikov, V.D.; Smolov, V.B. 
 Author Affiliation: Leningrad Inst. Electrical Engng., USSR 
 Journal: Izvestiya Vysshikh Uchebnykh Zavedenii, Priborostroenie no.2 
p.60-2 
 Publication Date: 1973 Country of Publication: USSR 
 CODEN: IVUBAY ISSN: 0021-3454 
 Language: Russian Document Type: Journal Paper (JP) 
 Treatment: Theoretical (T) 
 Abstract: Results are given of an analysis of r.m.s. errors, 
characteristic of the Volder algorithm. In the case of rotation and vector 
operations, the occurrence of one group of errors is explained by the 
presence of bias at each iteration. Due to a difference between these 
operations the errors differ; the analysis deals particularly with the 
Volder iterative technique for the rotation operation. The mathematical 
error expectation and dispersion are evaluated. A graph is given for 
calculating the number of additional digits required, for a given order of 
representation of the numbers and permissible r.m.s. error. (6 Refs) 
 Subfile: B C 

 
RECORD OF MY PUBLICATIONS in the CORDIC field:
 
Titles of the books:
 
1.V.D.Baykov, S.N.Vashkevich, M.B.Sergeev Applied subroutines for micro-
 processor checking and control systems, St.Petersburg, Politechnika
 1992,223p.
2.V.D.Baykov et al. Special-purpose computers , textbook for undergradua-
 tes, 1989, 80p.
3.V.D.Baykov, S.N.Vashkevich, Solving of trajectories problems in micro
 processor systems of numerical controls, Leningrad, Mashinostroenie,1986,
 106p.
4.V.D.Baykov, V.B.Smolov, Special-purpose processors:iterative algorithms
 and structures,Moscow,Radio & svjaz, 1985,288p.
5.V.D.Baykov,S.A.Seljutin, Elementary functions evaluation in microcalcu
 lators, Moscow,Radio & svjaz,1982,64p.
6.V.D.Baykov et.al. Special computers, Moscow, Vischaja shkola,1981,279p.
7.V.D.Baykov,V.B.Smolov, Hardware implementation of elementary functions
 in computers, Leningrad State University, 1975,96p.
 
 
Titles of the selected papers:
 
1.V.D.Baykov, A.A.Smagin High-precision table-lookup interpolation of
 functions in macrocomputer, Application of discrete systems, 1993,n27,
 p.126-134.
2.V.D.Baykov, Overlapping of parallel data processing with their bit-serial
 input, Izvestia VUZov,Priborostroenie, 1990,n4, p.25-29.
3.V.D.Baykov,M.B.Sergeev,M.A.Mohammed Computing systems architecture orien-
 ted to solving linear systems equations. Upravljajushie sistemi i mashini,
 1990,n.4.
4.V.D.Baykov, M.B.Sergeev Fast programs for the solution of linear equa-
 tions for control microcomputers and personal computers, Vichislitelnaya
 technika i voprosi kibernetiki, 1990, n26, p.75-79
5.V.D.Baykov, V.B.Smolov, Special-purpose processors for high-speed micro
 processor systems, Proektirovanie funktsionalno-orientirovannich vichis
 litelnih system,1990, n11,Leningrad State University
6.V.D.Baykov, S.D.Bulgakova Bit-pipeline structures for digital signal
 processing, Avtomatica and VT, Riga, 1990, n6, p.48-53.
7.V.D.Baykov,M.B.Sergeev, Error estimation of solving linear systems equa-
 tions by digit by digit technique, Elektronnoe modelirovanie, 1989,n5.
8.V.D.Baykov,M.B.Sergeev, Systolic structures for linear systems equations
 solving, Elektronnoe modelirovanie, 1988,n5.
9.V.D.Baykov,V.P.Golubev, Simulation algorithms of multiplication and data
 sampling in digital signal processing, Gibridnie vichislitelnie mashini
 & compleksi,1987,n10
10.V.D.Baykov, M.B.Sergeev, Hardware-oriented algorithms of linear systems
 equations solving, Upravljajuschie sistemi i mashini,1986, n2
11.V.D.Baykov, A.I.Kris, An unit for hyperbolic functions evaluation,
 Izvestija VUZov,Priborostroenie,1985,n9
12.V.D.Baykov,V.V.Kabanov,A.M.Popov, Multiprocessor organization for
 digital filter based on microprocessors, Mikroprocessornie sredstva
 i sistemi, 1985, n6
13.V.D.Baykov, Method and unit for polynomial evaluation, Gibridnie
 vichislitelnie mashini i kompleksi, 1984, n7
14.V.D.Baykov, Digit by digit technique with direct checking of
 convergence, Analiz i sintez diskretnih sistem, 1984, n20
15.V.D.Baykov, S.A.Seljutin, Hardware-oriented method for linear algebra
 problems solving, Automatika i vichislitelnaja tehnika, 1983,n1
 V.D.Baykov, S.A.Seljutin, Experimental analysis of computer errors,
 Electronnaja technika, 10 (Microelectronica), n4(34), 1982, p.29-32
16.V.D.Baykov, A.S.Aljkhovik, Multifunctional array pipeline structures,
 Izvestija VUZov, Priborostroenie, 1982,n4,p.48-52.
17.V.D.Baykov, V.V.Pikulin Convergense analysis of iterative processes
 for functions arcsin Y and arsh Y based on digit by digit method.
 Design of input/output computer devices, Leningrad, State University,
 1981, p.157-162.
18.V.D.Baykov, A.S.Aljkhovik, V.B.Smolov Pipeline arrays for elementary
 functions evaluation, Automatica i telemekhanika, 1981, n5,p.181-184.
19.V.D.Baykov, V.V.Pikulin Performance evaluation of elementary functions
 computation based on digit by digit technique, Vichisliteljnaya technika
 i voprosi kibernetiki, n16, Leningrad University, 1979, p.85-97.
20.V.D.Baykov, A.A.Makhanov Algorithms for calculating of elementary fun-
 ctions using "digit by digit method with direct convergence testing,
 Izvestia VUZov, Priborostroenie ,v22, n6, p.53-65.
21.V.D.Baykov, V.B.Smolov Principles and prospectives of digit by digit
 method application, Elektronika i metodi gibridnikh vichislenij,
 Kiev, 1978, p.119-130.
22.V.D.Baykov Optimization of performance digit by digit method, Vichisli-
 teljnaya technika, n7, p.168-171.
23.V.D.Baykov Improvement of performance digit by digit method, Proektirov-
 anie i primenenie mini-computerov, Kiev, 1977, p.11-16.
24.V.D.Baykov, V.B.Smolov Promising directions in the use of digit by digit
 methodes in microprocessors, Izv.VUZov, Priborostroenie, n5, p.46-53.
25.V.D.Baykov Digit by digit floating point computation of logarithmic and
 exponential functions, Izv.VUZov of the USSR, Priborostroenie, 1977,
 n5, p.59-62.
26.V.D.Baykov, V.V.Pikulin Using double iteratoins for arcsine and arsh
 functions evaluation, Vichisliteljnaja tekhnika, N6, State University,
 1977, p.99-64.
27.V.D.Baykov, V.B.Smolov Errors of absolute value of vector evaluation,
 based on Volder's algorithm, Izv. VUZov of the USSR, Priborostoenie,
 1976, N6, p.55-59.
28.V.D.Baykov Evaluation of performance of navigational computers, using
 digit by digit method, Voprosi radioelectroniki, General ser.,1976,
 N5, p.28-34.
29.V.D.Baykov, S.A.Goldberg, S.A.Seljutin Multiplication-division opera-
 tion based on Volder's algorithm, Electronnaja tekhnika, ser.3 Microelec-
 tronica, N4(58), 1975
30.V.D.Baykov, E.F.Morozkov, D.I,Chapurskij Application of iterative metho-
 des for radionavigation parameters transform in special-purpose computers,
 Vichisliteljnaja tekhnica, N4, 1974, p.24-35.
31.V.D.Baykov, V.B.Smolov One method for elementary functions evaluation
 in special-purpose computers, IZV. VUZov of the USSR, 1974, N4, p.64-68.
32.V.D.Baykov Convergence analysis of elementary functions computation based
 on digit by digit method, IZV Leningrad Institute of El.Eng., n.147, 1974,
 p.13-19.
33.V.D.Baykov, V.B.Smolov Analysis of errors of computation of elementary fun-
 ctions by special-purpose computer, Tochnost'&Nadezhnost' Kibern.syst.,
 N2, 1974, p.65-68
34.V.D.Baykov, V.B.Smolov Analysis of a group of Volder's algorithm error,
 Izv.VUZov of the USSR, Priborostroenie, 1973, N2,p.60-62.
35.V.D.Baykov, V.B.Smolov Choose of word size of the computer, using Volder
 algorithm, Izv.VUZov of the USSR, Priborostroenie, 1973, N7, p.53-57.
36.V.D.Baykov, V.B.Smolov, Errors in arithmetic operations in a fixed-point
 digital computers, Izv.VUZov of the USSR, Priborostroenie, N4, 1972,
 p.65-68.
37.V.D.Baykov, N.N.Divin Problems of choosing of instruction set for naviga-
 tional computer, Vichisliteljnaja tekhnika na morskom flote, Leningrad,
 1972, p.147-151.
38.V.D.Baykov Using of digit by digit method in navigational computers,
 Deposition manuscript D-2944, 1972, 16p.
39.V.D.Baykov Way of choosing of the word size of special-purpose naviga-
 tional computer, Deposited manuscript D-2942, 1971, 11p.
40.V.D.Baykov et al. Development of high-speed digital coordinate transformer,
 Report of the Leningrad Inst. of El.Eng. 1967, 144p.
 
 
 Titles of the Russian Patents:
 
1. V.D.Baykov Division device, pat.N417790, cl.G06F 7/52, 1974.
2. V.D.Baykov, V.V.Pikulin Device for exp function with floating point,
 pat.N572780, cl.G06F 5/02, 1975.
3. V.D.Baykov, A.N.Chuvatin Pseudodivision device, pat.N742931, cl.G06F 7/38,
 1980.
4. V.D.Baykov, A.A.Fayvinov Device for arctan evaluation, pat.N748418,
 cl.G06F 15/34, 1980.
5. V.D.Baykov et al. FFT device, pat.N752348, cl.G06F 15/31, 1980
6. V.D.Baykov, A.N.Chuvatin Pseudodivision device, pat.N752336, cl.G06F 7/52,
 1981
7. V.D.Baykov et. al Arithmetic device, pat.N798823, cl.G06F 7/38, 1981
8. V.D.Baykov , A.N.Chuvatin Device for solving linear systems equations,
 pat.N811274, cl.G06F 15/324, 1981
9. V.D.Baykov, S.A.Seljutin Device for exp computation, pat.N798857,
 cl. G06F 15/21, 1981
10.V.D.Baykov et. al Logarithmic device, pat.N918946, cl.G06F 7/556, 1982
11.V.D.Baykov et. al Device for computation log&exp functions, pat.N928350,
 cl.G06F 7/556, 1982
12.V.D.Baykov et.al Device for hyperbolic functions computation,
 pat.N 957208, cl.G06F 7/548, 1982
13.V.D.Baykov et al FFT device, pat.N1042475, cl.G06F 7/544, 1982
14.V.D.Baykov et.al Device for vector rotation, pat.N1132285, cl.G06F 7/544,
 1984
15.V.D.Baykov, A.A.Bakanov Device for polynomial evaluation, pat.N1134947,
 cl.G06F 15/31, 1985
16.V.D.Baykov et al. Parabolic interpolator, pat.N1160370, cl.G05B 19/415,
 1985
17.V.D.Baykov, M.B.Sergeev Computer device, pat.N1196856, cl.G06F 7/544,
 1985
18.V.D.Baykov, M.B.Sergeev Device for solving linear systems equations,
 pat.N1179367, cl.G06F 15/324, 1985
19.V.D.Baykov et. al Functional transformer, pat.N1251103, cl.G06F 15/31,
 1986
20.V.D.Baykov et. al Circular interpolator, pat.N1081623, cl.G05B 19/18,
 1984
21.V.D.Baykov et. al Functional transformer, pat.N1105888, cl.G06F 7/544,
 1984
22.V.D.Baykov et.al Device for functions evaluation, pat.N1314337,
 cl.G06F 7/548, 1987
23.V.D.Baykov et.al Device for mean evaluation, pat.N1322315, cl.G06F 15/36,
 1987
24.V.D.Baykov et.al Device for DSP, pat.N1336028, cl.G06F 15/332, 1987
25.V.D.Baykov et.al Functional transformer, pat.N1339554, cl.G06F 7/544,
 1987
26.V.D.Baykov et. al. Device for solving linear systems equations,
 pat.N1394218, cl.G06F 15/02, 1988
27.V.D.Baykov et.al Functional transformer, pat,N1487030, cl.G06F 7/544,
 1989
28.V.D.Baykov, M.B.Sergeev Device for solving linear systems equations,
 pat.N1324035, cl.G06F 15/02, 1987
29.V.D.Baykov, S.D.Bulgakova Coordinates transformer, pat.N1536375,
 cl.G06F 7/548, 1990
30.V.D.Baykov et.al Interpolator, pat.N1541557, cl.G05B 19/18, 1990
31.V.D.Baykov, S.D.Bulgakova Coordinates transformer, pat.N1566345,
 cl.G06F 7/548, 1990
32.V.D.Baykov et.al Device for linear systems equations, pat.N1566364,
 cl.G06F 15/32, 1990
33.V.D.Baykov et.al Device for square rooting, pat.N1569827,
 cl. G06F 7/552, 1990
34.V.D.Baykov, S.D.Bulgakova Device for estimation of statistical charac-
 teristics, pat.N1644163, cl.G06F 15/36, 1991.
 
 
 
Titles of the selected recent conferences presentations:
 
1.V.D.Baykov, A.A.Smagin, V.B.Smolov Table-lookup interpolation of
 functions in microcomputers. Multiprocessor computer systems, All-
 union conference,Taganrog, 1991.
2.V.D.Baykov,S.D.Bulgakova, Bit-level pipelined algorithms and structures
 for signal processing applications, Latvian signal processing interna-
 tional conference, 1990,Riga,April 24-26,vol.2,p.208-212, (in English)
3.V.D.Baykov, Dedicated processors on VLSI for solving of linear systems
 equations, SAPR-90, Conference on computer aided design, 1990,Crimea,
 May 5-14, p.13-14.
4.V.D.Baykov,M.B.Sergeev, Concurrency computer systems, X Symposium po
 probleme izbitochnosti v vichislitelnih sistemah, Leningrad,26-28 May,
 1989,vol.3, p.96-97
5.V.D.Baykov, S.D.Bulgakova, Combination of functions evaluation with
 input of data, Problemi vichislitelnoi matematiki i avtomatizacii
 nauchnih issledovanii, All-union conference, Alma-ata, 1988,24-28
 October, vol.4,p.16-17
6.V.D.Baykov,S.D.Bulgakova,S.N.Vashkevich, Algorithms and programs of
 statistical estimations evaluation in microprocessor control systems,
 Povishenie effectuvnosti sredstv obrabotki informacii, All-union
 conference,Tambov, 1988, May 14-18, p.130-132
 
 The total number of my publications , including papers, patents and
 reports is over 130.
 The Journals "Electronic modeling"(Engineering Simulation) are translated
 into English in the USA, since 1981
http://www.rql.kiev.ua/electr_model/index_eng.html
 
 The Journal "Izvestia VUZov of the USSR" is reviewed in "Computer and
 Control Abstracts".
 
 
 
 

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